ML-DSA Core | Dyber IP Cores

Overview

Complete lattice signature hardware.

A complete hardware implementation of ML-DSA, the NIST-standardized lattice digital signature scheme. Full KeyGen, Sign (including the rejection-sampling loop), and Verify, assembled from a verified library of lattice-arithmetic building blocks. All three security levels are supported and runtime-selectable from a single instantiation.

Key Features

What the core delivers.

ML-DSA-44, 65, and 87, runtime-selectable
Full KeyGen / Sign (rejection loop) / Verify (accept-reject)
Built from 11 verified primitive blocks + 4 SHAKE/sampler wrappers (NTT for q=8380417, decompose/rounding, rejection samplers, mask expansion, sample-in-ball, bit-pack/unpack, pointwise multiply, matrix/secret/mask/challenge assembly)
Constant-time target

Benefits

Why it matters.

Quantum-safe code signing, firmware authentication, attestation, and secure boot
Full sign+verify in hardware (not just verify), for on-device signing

Standards and Verification

Compliance and test coverage.

Standard

NIST FIPS 204

Implements the ML-DSA algorithm as specified in NIST FIPS 204, the module-lattice digital signature standard.

Verification

ACVP-Exact

ACVP-exact across all levels. Golden model ACVP-certified 210/210.

Note on "Verified": "Verified" means RTL byte-exact against official test vectors. It does not imply FIPS 140-3 certification or foundry sign-off.

Availability and Deliverables

What you receive.

Available as verified soft IP. Foundry-portable RTL ready for integration.

RTL

Synthesizable SystemVerilog RTL

Foundry-portable source, lint-clean, synthesis-ready for any target process or FPGA.

Verification

Self-Checking Testbench(es)

Constrained-random and directed testbenches that verify functional correctness against NIST test vectors.

Reference

Python Golden Reference Model

Bit-exact Python implementation for independent cross-checking and integration testing.

Regression

cocotb Regression Suite

Automated cocotb test suite for continuous integration and regression testing across environments.

Synthesis

Synthesis Scripts

Ready-to-run synthesis scripts for common EDA tool flows, with example constraint files.

Documentation

Integration and User Guide

Complete integration guide covering interfaces, timing, configuration parameters, and example SoC hookup.

Firm/hard IP (hardened netlist for a target node) available on foundry enablement.

ML-DSA Core.