Flagship Accelerator

QUAC-100.

The first PCIe-based cryptographic accelerator purpose-built for the post-quantum era, delivering sub-microsecond operations with NIST-standardized algorithms and integrated quantum random number generation.

1.2M+
Operations per second. Full PQC key encapsulation at wire speed.
≤700ns
Full KEM cycle. KeyGen, encapsulate, and decapsulate combined.
>800 Mbps
Quantum random number generation. SP 800-90B verified entropy.
3-in-1
PQC Accelerator + HSM + QRNG on a single PCIe card.
Core Capabilities

Three engines,
one card.

PQC Acceleration

Post-Quantum Cryptography

Hardware-accelerated NIST-standardized algorithms with dedicated NTT engines and polynomial arithmetic units.

ML-KEM FIPS 203 / ML-DSA FIPS 204 / SLH-DSA FIPS 205 / Hybrid modes
HSM Functionality

Hardware Security Module

Tamper-evident secure key storage with role-based access control and hardware-enforced isolation boundaries.

FIPS 140-3 Level 3 / Tamper-evident / Secure key storage / RBAC
Quantum RNG

Quantum Random Numbers

True quantum entropy source providing over 800 Mbps of SP 800-90B-verified random data for key generation and nonces.

>800 Mbps throughput / SP 800-90B compliant / True quantum entropy
Architecture

Built for speed
and security.

FeatureSpecificationDetail
Sub-Microsecond Latency≤700ns full KEM cycleDedicated hardware datapath, zero-copy processing
NIST-StandardizedFIPS 203, 204, 205ML-KEM, ML-DSA, SLH-DSA with all parameter sets
Side-Channel ResistantConstant-time executionPower analysis, timing, and fault injection countermeasures
PCIe Gen5 Interfacex8x8 (or Gen4 x16)Backward compatible with Gen3+
NTT Engines16-way Radix-32 arrayDedicated Number Theoretic Transform acceleration
Hybrid SupportPQC + ClassicalCombined ML-KEM + ECDH, ML-DSA + ECDSA modes
Performance

Up to 49x faster
than software.

Head-to-head comparison against optimized software implementations. CPU baseline: Intel Core i7-13700K with AVX2 optimizations.

ML-KEM-512 (FIPS 203)

OperationCPU (AVX2)QUAC-100Speedup
KeyGen~8.7 µs180 ns48x
Encapsulate~10.8 µs220 ns49x
Decapsulate~13.4 µs280 ns48x
Full Cycle~32.9 µs≤700 ns47x

ML-DSA-44 (FIPS 204)

OperationCPU (AVX2)QUAC-100Speedup
Sign~40 µs850 ns47x
Verify~12.3 µs320 ns38x

Note: CPU baseline is Intel Core i7-13700K with AVX2 optimizations. QUAC-100 measurements taken at sustained throughput. Actual results may vary based on system configuration and workload.

Specifications

Technical details.

Hardware

Form FactorPCIe full-height, 3/4 length, dual-slot
InterfacePCIe Gen5 x8x8 (or Gen4 x16)
PlatformAMD Versal HBM Adaptive SoC
Memory32 GB HBM2e (819 GB/s)
TDP190W
CoolingPassive (heatsink included)

Algorithms

ML-KEM512 / 768 / 1024 parameter sets
ML-DSA44 / 65 / 87 parameter sets
SLH-DSAAll variants (SHA-2 and SHAKE)
HybridClassical + PQC composite modes
QRNGSP 800-90B, >800 Mbps
Certifications
FIPS 140-3 Level 3 FIPS 203 FIPS 204 FIPS 205 SP 800-90B CC EAL4+ (Planned) PCIe Gen5 RoHS
Software

Full-stack integration.

Operating Systems

Platform Support

Native kernel drivers for Linux, FreeBSD, and Windows Server. Full UEFI and ACPI integration.

SDK

8 Language Bindings

C, C++, Python, Rust, Go, Java, Node.js, and C#. Comprehensive API with async support.

Standards

Crypto Providers

PKCS#11 v2.40, OpenSSL 3.x provider, Windows CNG interface. Drop-in compatibility.

Virtualization

SR-IOV Support

Single Root I/O Virtualization for multi-tenant deployments. Docker and Kubernetes ready.

Management

Remote Administration

Web-based management console, SNMP monitoring, and syslog integration for enterprise environments.

Compliance

Certification Ready

FIPS 140-3 Level 3 validation in progress. Common Criteria EAL4+ evaluation planned.

Contact

Start building
quantum-safe
infrastructure.

Pilot program now accepting applications. Request evaluation hardware or talk to our engineering team.

Start PilotContact Engineering