Architecture-agnostic post-quantum cryptographic IP cores designed for integration into any SoC. From mathematical acceleration blocks to complete algorithm implementations, our FPGA-validated IP enables rapid deployment of quantum-resistant security. Supports x86, ARM, and RISC-V via standard AMBA interfaces (AXI4, APB, AHB).
Same RTL integrates with x86, ARM, RISC-V via standard AMBA interfaces.
All specs measured on FPGA-validated hardware with timing closure.
No secret-dependent branches or memory access patterns.
Full ML-KEM (FIPS 203), ML-DSA (FIPS 204), SLH-DSA (FIPS 205).
Fundamental building blocks for PQC implementations, optimized for both area efficiency and maximum throughput.
| Core | Description | Configurations |
|---|---|---|
| NTT Engines | Number Theoretic Transform. Computational core for all lattice-based cryptography. | Radix-2 / Radix-4 / Radix-8 / Radix-16 |
| Modular Arithmetic | Barrett and Montgomery. Polynomial add/subtract/multiply with NTT integration. | Kyber (q=3329) and Dilithium (q=8380417) |
| Hash Cores | SHA-3 / SHAKE. Keccak-f[1600] permutation with XOF support. | SHA3-256, SHA3-512, SHAKE-128, SHAKE-256 |
| Sampling Units | Cryptographic Samplers. Constant-time distribution sampling. | CBD, uniform rejection, SP 800-90B entropy |
Full implementations of NIST-standardized post-quantum algorithms, ready for integration.
| IP Core | Description | Operations | Variants |
|---|---|---|---|
| ML-KEM (FIPS 203) | Key encapsulation mechanism for secure key exchange and encryption. (CRYSTALS-Kyber) | KeyGen, Encaps, Decaps | 512, 768, 1024 |
| ML-DSA (FIPS 204) | Digital signature algorithm for authentication and integrity. (CRYSTALS-Dilithium) | KeyGen, Sign, Verify | 44, 65, 87 |
| SLH-DSA (FIPS 205) | Hash-based signatures for conservative security assumptions. (SPHINCS+) | KeyGen, Sign, Verify | 128f, 128s, 256f |
Built-in countermeasures against side-channel attacks and designed for certification readiness.
| Feature | Details |
|---|---|
| Constant-Time Execution | No secret-dependent branches or memory access patterns |
| Deterministic Cycles | Fixed execution time regardless of input data |
| Uniform Memory Access | Cache-timing resistant memory patterns |
| DPA Countermeasures | Optional first-order masking for DPA/SPA resistance (boolean and arithmetic masking) |
| Standard | Details |
|---|---|
| FIPS 140-3 | Security boundary docs, self-tests, KAT vectors |
| Common Criteria | EAL4+ target, security documentation |
| ISO 26262 | Automotive: design docs support ASIL-B integration (customer-led certification) |
| DO-178C | Aerospace: design artifacts compatible with DAL-C workflow (customer-led certification) |
Synthesizable RTL (Verilog/SV/VHDL). FPGA synthesis scripts. Constraint templates. Reference implementations.
UVM-based verification. NIST KAT vectors. Functional coverage models. Formal verification assertions.
Bare-metal driver libraries. Reference Linux modules. API documentation. Header files.
Complete datasheets. Integration guides. Security target docs. FIPS boundary docs.
Flexible licensing models to match your development stage and deployment scale.
| Tier | Description | Includes |
|---|---|---|
| Evaluation | 90-day evaluation with full RTL access for design-in assessment. | Full RTL source code. FPGA synthesis and simulation. Technical support (email). No production rights. |
| Per-Design | Single SoC/ASIC design with production rights for one product line. | All eval deliverables. Production rights (1 design). Integration support. 12 months updates. |
| Volume | Multi-design license with per-unit royalty structure for high-volume. | Unlimited designs. Volume-tiered royalties. Dedicated FAE support. Custom modifications. |
| Perpetual | Unlimited use across all products with no per-unit royalties. | Unlimited designs and volume. Zero royalties. Priority engineering support. Joint roadmap input. |
All licenses include NDA-protected deliverables. Contact our licensing team for detailed terms, pricing, and custom arrangements. Government/defense licensing available through Carahsoft.
Pilot program now accepting applications. Request evaluation hardware or talk to our engineering team.