Building PQC from scratch takes 18 to 24 months and deep lattice cryptography expertise. Dyber's FPGA-validated IP cores and the QCORE-C1 chiplet let semiconductor companies, SoC designers, and networking OEMs integrate quantum-resistant security in weeks, not years, with 30 patents pending protecting the underlying innovations.
Every IP core is FPGA-validated on AMD/Xilinx Zynq UltraScale+ and delivered as synthesizable RTL with comprehensive testbenches, integration guides, and reference designs.
| IP Block | Description | Key Specifications |
|---|---|---|
| NTT-R32 | Patented Radix-32 NTT engine delivering 4x throughput vs. standard Radix-2 implementations. The mathematical core powering all lattice-based PQC operations. | 4x speedup, 1 GHz target, fully pipelined, patent pending |
| ML-KEM-CORE | Complete ML-KEM (FIPS 203) implementation supporting all three security levels (512, 768, 1024). Key generation, encapsulation, and decapsulation with integrated NTT-R32. | Security Levels 1, 3, 5. Constant-time. FIPS 203 compliant |
| ML-DSA-CORE | Complete ML-DSA (FIPS 204) implementation with key generation, signing, and verification for all parameter sets (44, 65, 87). Optimized rejection sampling. | Security Levels 2, 3, 5. Optimized rejection sampling. FIPS 204 compliant |
| KECCAK-ACCEL | High-throughput Keccak permutation engine supporting SHA3-256, SHA3-512, SHAKE-128, and SHAKE-256. Eliminates the hashing bottleneck constraining software PQC. | SHA3-256 at 20 Gbps. SHAKE support. FIPS 202 compliant |
| SCA-SHIELD | Side-channel countermeasure wrapper providing DPA/SPA, electromagnetic analysis, timing attack, and cache-timing resistance. Integrates around any IP core. | DPA/SPA/EMA protected. Constant-time. >99.5% AI detection accuracy |
A complete post-quantum cryptographic accelerator as a 6x6mm chiplet for multi-chip module integration. Connects to host SoC via Dyber's QLI (Quantum Lattice Interface) with <3ns latency. Currently prototyping on SkyWater SKY130 with production on GlobalFoundries 22FDX.
Flexible licensing tiers designed for different integration depths, from evaluation through volume production.
Full RTL access on an FPGA evaluation platform with testbenches and performance benchmarks. 90-day evaluation period with engineering support.
Full synthesizable RTL for ASIC or FPGA integration. All IP blocks, SCA-SHIELD wrappers, and integration support through first silicon. Volume royalty pricing.
Skip RTL integration entirely. The QCORE-C1 chiplet drops into your multi-chip module via QLI interface as a known-good die with <3ns interface latency. US-based fabrication.
Dyber offers a differentiated licensing approach. Signature verification capabilities are licensed broadly at accessible price points, while signature generation (signing) is reserved for premium products and higher-tier licenses.
This creates a natural ecosystem. OEMs embedding verification-only IP in high-volume endpoint devices create demand for Dyber's high-performance signing products in backend infrastructure, or upgrade to full signing licenses as their needs evolve.
| License Tier | Capabilities | Pricing |
|---|---|---|
| Verify-Only | ML-KEM Decaps + ML-DSA Verify | Lower cost |
| Full License | All operations: KeyGen + Sign + Verify | Premium |
| Platform License | Full suite + SCA-SHIELD + QRNG IP | Enterprise |
Chipmakers integrating PQC into next-generation processors, network ASICs, and security co-processors. Standard AXI/AHB interfaces.
Router, switch, and firewall manufacturers adding PQC to hardware platforms. ML-KEM-CORE for high-speed TLS key exchange with SCA-SHIELD resistance.
Application-specific SoCs for automotive, industrial, and smart home. Ultra-low-power IP variants and the QCORE-C1 chiplet for constrained budgets.
Defense contractors and telecom equipment manufacturers. Pre-validated IP cores targeting AMD/Xilinx and Intel FPGAs for reduced integration risk.
Hardware security module vendors adding PQC acceleration. Dyber provides the PQC engine while the vendor adds key management and tamper protection.
Defense primes building CNSA 2.0-compliant systems. US-based IP provenance and GlobalFoundries 22FDX production satisfy supply chain requirements.
Pilot program now accepting applications. Request evaluation hardware or talk to our engineering team.