Dyber PQC IP Cores

Dyber Docs Hub Homepage PQC IP Cores

Licensable post-quantum cryptography IP cores for FPGA and ASIC integration. Includes ML-KEM, ML-DSA, SLH-DSA, NTT engine, QRNG, and side-channel protection blocks.

IP Core Catalog

Complete catalog of available PQC IP cores with specifications, area, and performance data.

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Crypto Primitives

Low-level cryptographic primitive blocks including SHA-3, SHAKE, and polynomial arithmetic.

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NTT Engines

Number Theoretic Transform engine architectures, configurations, and integration options.

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Algorithm Accelerators

Dedicated ML-KEM, ML-DSA, and SLH-DSA accelerator IP cores.

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Security Architecture

Side-channel protection, fault injection countermeasures, and secure design patterns.

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Interface Reference

AXI, AHB, and custom bus interface specifications for IP core integration.

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Integration Guide

Step-by-step integration guide for FPGA and ASIC design flows.

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Verification

Testbench suites, formal verification, and compliance testing for PQC IP cores.

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Downloads

Evaluation packages, documentation archives, and design collateral.

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Release Notes

IP core version history, bug fixes, and feature updates.

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Support

Technical support, licensing inquiries, and community resources.

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