QUAC 100 Hardware Architecture

Quantum-Resistant Universal Accelerator Card — Technical Reference

Rev 2.0 November 2025 FIPS 140-3 (IUT — atsec) Download PDF

The QUAC 100 (Quantum-Resistant Universal Accelerator Card) is a PCIe-based cryptographic accelerator purpose-built for post-quantum cryptography. Built on the AMD Versal HBM adaptive SoC platform, it integrates NIST-standardized PQC acceleration, hardware security module functionality, quantum random number generation, and AI-powered side-channel protection in a single PCIe card.

The QUAC 100 addresses the critical performance bottleneck created by software-only PQC implementations. Where software ML-KEM-768 encapsulation typically completes in 200+ microseconds, the QUAC 100 delivers the same operation in 4.8 μs — a 43x improvement — while simultaneously providing HSM-grade key management and hardware-quality entropy generation.

43x+
Faster than software PQC
PCIe Gen5
x8x8 host interface
190W
Typical power consumption
32 GB
HBM2e in-package memory

Hardware Overview #

Component Summary

Table 1 — QUAC 100 Component Summary
ComponentDescription
PlatformAMD Versal HBM Adaptive SoC — single-device architecture
PQC AlgorithmsML-KEM (FIPS 203), ML-DSA (FIPS 204), SLH-DSA (FIPS 205) — all parameter sets
SymmetricAES-128/256-GCM, AES-256-XTS, SHA3-256/512, SHAKE-128/256
Memory32 GB HBM2e in-package, 820 GB/s bandwidth
QRNGDual free-running ring oscillator entropy sources, >800 Mbps conditioned output (NIST SP 800-90B)
HSMIntegrated hardware security module, FIPS 140-3 Level 3 (IUT with atsec)
SecurityAI-powered side-channel protection: DPA, SPA, EMA, timing attack countermeasures
Host InterfacePCIe Gen5 x8x8 (or Gen4 x16), 128b/130b encoding, 8 DMA channels
SoftwareQuantaCore SDK — OpenSSL 3.x provider, PKCS#11, C/C++, Python, Go, Rust, Java

Key Features

Table 2 — Three-in-One Value Proposition
CapabilityReplacesBenefit
PQC AccelerationSoftware PQC libraries43x+ throughput improvement, sub-microsecond latency
HSM FunctionalityStandalone HSM appliance ($50K+)FIPS 140-3 Level 3 key management in every server
QRNG GenerationExternal QRNG deviceHardware-quality entropy at >800 Mbps conditioned for all crypto operations

System Architecture #

Click any block in the diagram below to explore the QUAC 100's functional subsystems.

QUAC 100 — AMD Versal HBM Adaptive SoC PCIe Gen5 x8x8 Host Interface DMA Engine · Job Dispatch · Memory Controller PQC Acceleration Engine ML-KEM (FIPS 203) ML-DSA (FIPS 204) SLH-DSA (FIPS 205) AES / SHA-3 / SHAKE QRNG Quantum Entropy Source HSM Engine Key Mgmt & Storage Side-Channel Protection & AI Threat Detection DPA · SPA · EMA · Timing Attack Countermeasures High Bandwidth Memory (HBM) Secure Key Storage · Cryptographic State · Session Management QuantaCore SDK & Software Integration OpenSSL Provider · PKCS#11 · Native APIs (C/C++, Python, Go, Rust, Java)

Architecture Overview

Click any block in the diagram to explore that subsystem.

PCIe Gen5 x8x8 Host Interface
PQC Acceleration Engine
Quantum Random Number Generator
HSM Key Management Engine
Side-Channel Protection
High Bandwidth Memory
QuantaCore SDK

Click to reset

Performance Benchmarks #

All figures from the QUAC 100 Hardware Documentation Rev 2.0, Appendix G. Throughput numbers represent batch processing on the full platform.

ML-KEM (FIPS 203) — Key Encapsulation

Table 3 — ML-KEM Performance by Security Level
OperationML-KEM-512ML-KEM-768ML-KEM-1024
KeyGen Latency4.2 μs5.1 μs6.8 μs
KeyGen Throughput238,000 ops/s196,000 ops/s147,000 ops/s
Encaps Latency4.0 μs4.8 μs6.2 μs
Encaps Throughput250,000 ops/s208,000 ops/s161,000 ops/s
Decaps Latency5.0 μs6.0 μs7.5 μs
Decaps Throughput200,000 ops/s167,000 ops/s133,000 ops/s

ML-DSA (FIPS 204) — Digital Signatures

Table 4 — ML-DSA Performance by Security Level
OperationML-DSA-44ML-DSA-65ML-DSA-87
KeyGen Latency8 μs12 μs18 μs
KeyGen Throughput125,000 ops/s83,000 ops/s56,000 ops/s
Sign Latency10 μs15 μs22 μs
Sign Throughput100,000 ops/s67,000 ops/s45,000 ops/s
Verify Latency6 μs8 μs12 μs
Verify Throughput167,000 ops/s125,000 ops/s83,000 ops/s

SLH-DSA (FIPS 205) — Hash-Based Signatures

Table 5 — SLH-DSA Performance by Security Level
OperationSLH-DSA-128sSLH-DSA-192sSLH-DSA-256s
KeyGen Latency50 μs75 μs100 μs
Sign Latency500 μs800 μs1,200 μs
Sign Throughput2,000 ops/s1,250 ops/s833 ops/s
Verify Latency25 μs35 μs50 μs
Verify Throughput40,000 ops/s29,000 ops/s20,000 ops/s

Symmetric Cryptography & QRNG

Table 6 — Symmetric Performance & QRNG Output
AlgorithmThroughputLatency (1 KB)Notes
AES-128-GCM20 Gbps0.4 μsAuthenticated encryption
AES-256-GCM16 Gbps0.5 μsAuthenticated encryption
AES-256-XTS14 Gbps0.6 μsDisk encryption
SHA3-25620 Gbps0.4 μsHash function
SHA3-51212 Gbps0.7 μsHash function
QRNG Entropy>800 Mbps—Conditioned output, dual free-running ring oscillators (raw ~1.5 Gbps)

Power vs. Performance

Table 7 — Power Consumption by Workload
WorkloadPower (W)EfficiencyNotes
Idle45W—Device enabled, no operations
Mixed Workload (typical)160W—Representative datacenter load
AES-256-GCM (100%)180W89 Mbps/W16 Gbps at 180W
ML-DSA-65 Sign (100%)200W335 ops/W67K ops/s at 200W
ML-KEM-768 (100%)220W891 ops/W196K ops/s at 220W

Interfaces #

Host Interface

Table 8 — PCIe Host Interface Specifications
ParameterSpecification
Host InterfacePCIe Gen5 x8x8 (or Gen4 x16)
PCIe Encoding128b/130b
Link TrainingAutomatic Gen5/Gen4 fallback
DMA Channels8 independent (4 H2D, 4 D2H)
MSI-X Vectors8 vectors

PCIe Timing

Table 9 — PCIe Access Latency
OperationTypicalMaximumNotes
Configuration Read100 ns1 μs
Configuration Write100 ns1 μs
Memory Read (32-bit)200 ns500 nsBAR0 access
Memory Write (32-bit)150 ns400 nsPosted write
DMA Read (4 KB)2 μs10 μsHost to device
DMA Write (4 KB)2 μs10 μsDevice to host
MSI-X Interrupt300 ns1 μsLatency to host

Software Integration #

The QUAC 100 integrates with existing cryptographic infrastructure through multiple pathways, enabling both transparent acceleration of deployed applications and maximum-performance native access.

OpenSSL 3.x Provider

Transparent acceleration of existing applications via the standard OpenSSL provider interface. No application code changes required.

PKCS#11 Interface

HSM-compatible cryptographic token interface for enterprise key management systems and certificate authorities.

QuantaCore SDK

Native C/C++, Python, Go, Rust, and Java APIs for maximum performance. Full control over algorithm selection and batching.

Note: For complete SDK documentation including API reference, code examples, and integration guides, see the QuantaCore SDK Documentation.

Power & Thermal #

Table 10 — Power & Thermal Specifications
ParameterSpecification
Power Input12V from PCIe slot + auxiliary connector
Idle Power45W
Typical Power (mixed workload)190W
Maximum Power (sustained)200W
Peak Power232W
Operating Temperature (Ambient)0°C to +70°C
CoolingDual-width passive heatsink (active optional)
Required Airflow200 LFM minimum, 400 LFM recommended

Thermal Resistance

Table 11 — Thermal Resistance Values
PathValueNotes
Junction to Case (θJC)0.08 °C/WPackage specification
Case to Heatsink (θCS)0.05 °C/WWith thermal interface material
Heatsink to Ambient (θSA)0.15 °C/WAt 300 LFM airflow
Junction to Ambient (θJA)0.28 °C/WTotal thermal resistance

Mechanical Specifications #

Table 12 — Mechanical Specifications
DimensionSpecificationNotes
Form FactorPCIe full-height, 3/4 length, dual-slotStandard enterprise server compatible
Card Length267 mm (10.5″)Full-length PCIe specification
Card Height111.15 mm (4.37″)Standard PCIe height
WidthDual-slotTwo slot widths for heatsink clearance
Weight~500 gIncluding all components and heatsink
Edge ConnectorStandard 164-pin (x16)30 μ″ hard gold plating
PCB Layers202 oz outer, 1 oz inner copper
PCB Thickness2.40 mm ±0.20 mm

SKU Configurations #

The QUAC 100 is available in multiple configurations to match different deployment requirements.

QUAC100-STD

Standard

Balanced performance for development, testing, and moderate production workloads.

Platform
AMD Versal HBM
Memory
32 GB HBM2e
Typical Power
200W
Warranty
3 years

QUAC100-PRO

Professional

Maximum performance for enterprise and hyperscale datacenter deployments.

Platform
AMD Versal HBM (enhanced)
Memory
32 GB (expandable to 64 GB)
Typical Power
250W
Features
SR-IOV, active cooling

QUAC100-PRO-NET

Networking

Direct network connectivity with QSFP-DD mezzanine for TLS offload and network security appliances.

Network
2× QSFP-DD (400GbE)
TLS Offload
500K+ handshakes/s
Form Factor
Triple-slot
Max Power
350W

QUAC100-GOV

Government

Enhanced security features: tamper-evident packaging, FIPS 140-3 Level 3, CC EAL4+.

FIPS 140-3
Level 3 (IUT — atsec)
Common Criteria
EAL4+ (pending)
Origin
USA (ITAR-free)
Warranty
5 years

QUAC100-DEV

Developer Kit

Everything needed to begin software development and integration.

Includes
SDK, samples, tools
Support
Developer support included
Use Case
Development & evaluation
Warranty
1 year
Table 13 — Companion Documents
Document NumberTitleDescription
QUAC100-SDK-001QuantaCore SDK Developer GuideComplete SDK documentation including API reference, programming guides, and code examples
QUAC100-FW-001Firmware Architecture GuideDetailed firmware architecture specifications
QUAC100-DRV-001Linux Kernel Driver GuideLinux driver architecture, development guidelines, and kernel integration
QUAC100-DRV-002Windows KMDF Driver GuideWindows driver development using Kernel-Mode Driver Framework
QUAC100-INT-001OpenSSL Provider IntegrationIntegration guide for OpenSSL 3.x provider implementation
QUAC100-INT-002PKCS#11 Integration GuidePKCS#11 cryptographic token interface implementation
QUAC100-CERT-001FIPS 140-3 Security PolicyFIPS 140-3 Level 3 cryptographic module security policy
QUAC100-QSG-001Quick Start GuideInstallation and initial configuration

Support & Contact #

Table 14 — Contact Information
DepartmentContact
General Salessales@dyber.org
Enterprise Salesenterprise@dyber.org
Government Salesgovernment@dyber.org
Technical Supportsupport@dyber.org
Documentation Feedbackdocs@dyber.org
Security Vulnerabilitiessecurity@dyber.org
Important: QUAC 100 products must be installed and operated in accordance with the specifications in this document. Operating outside specified environmental conditions or power limits voids the warranty and may result in equipment damage.
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